Updates to the IPv6 Multicast Addressing Architecture

This document updates the IPv6 addressing architecture by re-defining reserved bits as generic flag bits (). The document provides also some clarifications related to the use of these flag bits (). This document updates , , and . These updates are logical consequences of the recommendation on the flag bits (). Textual representation of IPv6 addresses included in the RFC updates follows the recommendation in .

Bits 17-20 of a multicast address, where bit 1 is the most significant bit, are defined in and as reserved bits. This document defines these bits as generic flag bits so that they apply to any multicast address. These bits are referred to as ff2 (flag field 2) while the flgs bits in are renamed to ff1 (flag field 1). Within this document, flag bits denote both ff1 and ff2. Defining the bits 17-20 as flags for all IPv6 multicast addresses allows addresses to be treated in a more uniform and generic way, and allows for these bits to be defined in the future for different purposes, irrespective of the specific type of multicast address. specifies the updated structure of the addressing architecture. Further specification documents may define a meaning for these flag bits.

Some implementations and specification documents do not treat the flag bits as separate bits but tend to use their combined value as a 4-bit integer. This practice is a hurdle for assigning a meaning to the remaining flag bits. Below are listed some examples for illustration purposes: the reading of may lead to conclude that ff3x::/32 is the only allowed SSM IPv6 prefix block. states only ff70::/12 applies to Embedded-RP. Particularly, implementations should not treat the fff0::/12 range as Embedded-RP. To avoid such confusion and to unambiguously associate a meaning with the remaining flags, the following requirement is made: Implementations MUST treat flag bits as separate bits.

This document changes Section 4 of as follows: OLD:

NEW:

This document changes Section 6 of as follows: OLD: These settings create an SSM range of FF3x::/32 (where 'x' is any valid scope value). The source address field in the IPv6 header identifies the owner of the multicast address. NEW: If the flag bits in ff1 are set to 0011, these settings create an SSM range of ff3x::/32 (where 'x' is any valid scope value). The source address field in the IPv6 header identifies the owner of the multicast address. ff3x::/32 is not the only allowed SSM prefix range. For example if the most significant flag bit in ff1 is set, then we would get the SSM range ffbx::/32.

This document changes Section 2 of as follows: OLD:

NEW:

This document changes Section 3 of as follows: OLD:

NEW:

This document changes Section 4 of as follows: OLD: It MUST be a multicast address with "flgs" set to 0111, that is, to be of the prefix FF70::/12, NEW: It MUST be a multicast address with R-bit set to 1. It MUST have P-bit and T-bit both set to 1 when using the embedding in this document as it is a prefix-based address. This document changes Section 7.1 of as follows: OLD: To avoid loops and inconsistencies, for addresses in the range FF70::/12, the Embedded-RP mapping MUST be considered the longest possible match and higher priority than any other mechanism. NEW: To avoid loops and inconsistencies, for addresses with R-bit set to 1, the Embedded-RP mapping MUST be considered the longest possible match and higher priority than any other mechanism.

This document does not require any action from IANA.

Security considerations discussed in , and MUST be taken into account.

Special thanks to Brian Haberman for the discussions prior to the publication of this document. Many thanks to Jouni Korhonen and Tatuya Jinmei their review.